A Hardware Architecture for Motion Compensated Video Frame Rate Up-Conversion
نویسنده
چکیده
A hardware architecture for motion compensated, video frame rate up-conversion (MC-FRUC) applications is presented in this paper. The MC-FRUC architecture has been designed based on an advanced motion estimation (ME) and motion compensated frame interpolation (MCFI) algorithm to achieve interpolated frames with high level of quality. The proposed architecture is a flexible and highly parallel MC-FRUC that has been designed to support frame rate-up conversion (FRUC) for high definition (HD) video at high frame rate. The ME building block of the MC-FRUC circuit is a reconfigurable structure designed to support reconfigurations for single or multiple reference frames. The MCFI building block performs frame interpolation with the objective of minimizing of block artifacts, overlapping, and holes for the interpolated frames. Hardware implementations for the MC-FRUC design were carried out on FPGA where the circuit high performance FRUC capability has been validated. Key-Words: Frame rate up-conversion, Multi-frame motion estimation, Motion-compensated frame interpolation, Hardware architecture, FPGA implementation, Reconfigurable.
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